1. Field of the Invention
The present invention relate to a method of manufacturing a GaN-based field effect transistor that is formed of a nitride based compound semiconductor which is to be made use such as a device for a usage of a power electronics or a device for an amplification of high frequency or the like.
2. Description of the Related Art
A wide band gap semiconductor that is represented by a nitride based compound semiconductor of the III-V group has a high breakdown voltage, has an excellent property of an electronic transport, and has high heat conductivity. And then therefore the same is attractive as extremely for a material of a semiconductor device for a usage of such as a higher temperature, of a higher power or of a higher frequency. Moreover, in accordance with such as a field effect transistor (an FET) that has a hetero structure of an AlGaN/GaN or the like there is generated a two dimensional electron gas at an interface of therebetween due to the spontaneous and piezoelectric polarization effect. Further, such the two dimensional electron gas has a high electron mobility and a high carrier density. And then thereby becoming for a hetero junction FET (an HFET) for which there is designed to be made use of the hetero structure of the AlGaN/GaN to have an ON resistance to be as lower and to have a switching speed to be as faster as well. And hence it becomes possible to perform an operation under a high temperature. And then therefore in accordance with each of such the characteristics such the device becomes to be suitable as extremely for an application of a power switching.
Here, the ordinary AlGaN/GaN HFET is a device of a normally ON type in which there is designed to be flowed an electrical current at a period when there is not applied any bias at all to a gate, and in which there is designed to be cut off such the electrical current by applying an negative potential to the gate. On the other hand, for the application of the power switching, it is preferable to be as a normally OFF type in which there is designed not to be flowed any electrical current at all at the period when there is not applied any bias at all to the gate, and in which there is designed to be flowed such the electrical current by applying the positive potential to the gate, in order to ensure a safety at a time when the device is broken down.
In accordance with the following patent document 1 there is disclosed a field effect transistor (an MOSFET), in which there is designed for an electron supplying layer that is formed of such as an AlGaN or the like to be performed an etching off at a gate part, and then thereafter there is designed to be performed a formation of an insulating layer on to an etched surface of a drift layer, and hence there becomes to be a metal oxide semiconductor (MOS) structure. And then in accordance with such the structure there is designed to be performed a formation of a hetero junction structure that is comprised of a structure of the AlGaN and a GaN for between the gate and a drain. And then therefore it becomes able to prevent an ON resistance from increasing even under a state of a sheet carrier density to be required for maintaining the higher breakdown voltage, because the two dimensional electron gas that is to be performed the formation at the interface of such the hetero junction becomes to have a high electron mobility. That is to say, such the structure is suitable for realizing the high breakdown voltage and the lower resistance.
[Patent Document 1] Patent Application No. WO 03/071607
However, there are some points at issue that will be described in detail below in accordance with such the conventional technology which is disclosed in the patent document 1 which is mentioned above.
For example, such the structure of the two dimensional electron gas of the AlGaN/GaN receives an effect of a phenomenon that is called a current collapse of which there becomes to be varied an amount of the electrical current with corresponding to a passage of time. And then there becomes to be effected as negatively on the property of the device, such as an increase in the ON resistance after applying a high voltage to between the gate and the drain or the increase in the ON resistance at a period of energizing in a forward direction or the like.
And then as a cause of such the current collapse it is considered that there is effected due to such as an interface state of between the AlGaN layer and a passivation layer in the HFET or a deep energy level at an inner side of a channel layer (the drift layer) in the HFET or the like. Moreover, a damage on a surface of the AlGaN layer that is to be generated due to a heat history at a period of an alloying process in order to perform an ohmic contact of between a source electrode and a drain electrode in the HFET, and a generation of a reaction product of between the AlGaN layer and the passivation layer are the one of the causes for worsening the interface state in accordance with a manufacturing process.